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<span id="FRV-Options"></span><div class="header">
<p>
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<hr>
<span id="FRV-Options-1"></span><h4 class="subsection">3.19.16 FRV Options</h4>
<span id="index-FRV-Options"></span>

<dl compact="compact">
<dd><span id="index-mgpr_002d32"></span>
</dd>
<dt><code>-mgpr-32</code></dt>
<dd>
<p>Only use the first 32 general-purpose registers.
</p>
<span id="index-mgpr_002d64"></span>
</dd>
<dt><code>-mgpr-64</code></dt>
<dd>
<p>Use all 64 general-purpose registers.
</p>
<span id="index-mfpr_002d32"></span>
</dd>
<dt><code>-mfpr-32</code></dt>
<dd>
<p>Use only the first 32 floating-point registers.
</p>
<span id="index-mfpr_002d64"></span>
</dd>
<dt><code>-mfpr-64</code></dt>
<dd>
<p>Use all 64 floating-point registers.
</p>
<span id="index-mhard_002dfloat-1"></span>
</dd>
<dt><code>-mhard-float</code></dt>
<dd>
<p>Use hardware instructions for floating-point operations.
</p>
<span id="index-msoft_002dfloat-3"></span>
</dd>
<dt><code>-msoft-float</code></dt>
<dd>
<p>Use library routines for floating-point operations.
</p>
<span id="index-malloc_002dcc"></span>
</dd>
<dt><code>-malloc-cc</code></dt>
<dd>
<p>Dynamically allocate condition code registers.
</p>
<span id="index-mfixed_002dcc"></span>
</dd>
<dt><code>-mfixed-cc</code></dt>
<dd>
<p>Do not try to dynamically allocate condition code registers, only
use <code>icc0</code> and <code>fcc0</code>.
</p>
<span id="index-mdword"></span>
</dd>
<dt><code>-mdword</code></dt>
<dd>
<p>Change ABI to use double word insns.
</p>
<span id="index-mno_002ddword"></span>
<span id="index-mdword-1"></span>
</dd>
<dt><code>-mno-dword</code></dt>
<dd>
<p>Do not use double word instructions.
</p>
<span id="index-mdouble-1"></span>
</dd>
<dt><code>-mdouble</code></dt>
<dd>
<p>Use floating-point double instructions.
</p>
<span id="index-mno_002ddouble"></span>
</dd>
<dt><code>-mno-double</code></dt>
<dd>
<p>Do not use floating-point double instructions.
</p>
<span id="index-mmedia"></span>
</dd>
<dt><code>-mmedia</code></dt>
<dd>
<p>Use media instructions.
</p>
<span id="index-mno_002dmedia"></span>
</dd>
<dt><code>-mno-media</code></dt>
<dd>
<p>Do not use media instructions.
</p>
<span id="index-mmuladd"></span>
</dd>
<dt><code>-mmuladd</code></dt>
<dd>
<p>Use multiply and add/subtract instructions.
</p>
<span id="index-mno_002dmuladd"></span>
</dd>
<dt><code>-mno-muladd</code></dt>
<dd>
<p>Do not use multiply and add/subtract instructions.
</p>
<span id="index-mfdpic-1"></span>
</dd>
<dt><code>-mfdpic</code></dt>
<dd>
<p>Select the FDPIC ABI, which uses function descriptors to represent
pointers to functions.  Without any PIC/PIE-related options, it
implies <samp>-fPIE</samp>.  With <samp>-fpic</samp> or <samp>-fpie</samp>, it
assumes GOT entries and small data are within a 12-bit range from the
GOT base address; with <samp>-fPIC</samp> or <samp>-fPIE</samp>, GOT offsets
are computed with 32 bits.
With a &lsquo;<samp>bfin-elf</samp>&rsquo; target, this option implies <samp>-msim</samp>.
</p>
<span id="index-minline_002dplt-1"></span>
</dd>
<dt><code>-minline-plt</code></dt>
<dd>
<p>Enable inlining of PLT entries in function calls to functions that are
not known to bind locally.  It has no effect without <samp>-mfdpic</samp>.
It&rsquo;s enabled by default if optimizing for speed and compiling for
shared libraries (i.e., <samp>-fPIC</samp> or <samp>-fpic</samp>), or when an
optimization option such as <samp>-O3</samp> or above is present in the
command line.
</p>
<span id="index-mTLS"></span>
</dd>
<dt><code>-mTLS</code></dt>
<dd>
<p>Assume a large TLS segment when generating thread-local code.
</p>
<span id="index-mtls"></span>
</dd>
<dt><code>-mtls</code></dt>
<dd>
<p>Do not assume a large TLS segment when generating thread-local code.
</p>
<span id="index-mgprel_002dro"></span>
</dd>
<dt><code>-mgprel-ro</code></dt>
<dd>
<p>Enable the use of <code>GPREL</code> relocations in the FDPIC ABI for data
that is known to be in read-only sections.  It&rsquo;s enabled by default,
except for <samp>-fpic</samp> or <samp>-fpie</samp>: even though it may help
make the global offset table smaller, it trades 1 instruction for 4.
With <samp>-fPIC</samp> or <samp>-fPIE</samp>, it trades 3 instructions for 4,
one of which may be shared by multiple symbols, and it avoids the need
for a GOT entry for the referenced symbol, so it&rsquo;s more likely to be a
win.  If it is not, <samp>-mno-gprel-ro</samp> can be used to disable it.
</p>
<span id="index-multilib_002dlibrary_002dpic"></span>
</dd>
<dt><code>-multilib-library-pic</code></dt>
<dd>
<p>Link with the (library, not FD) pic libraries.  It&rsquo;s implied by
<samp>-mlibrary-pic</samp>, as well as by <samp>-fPIC</samp> and
<samp>-fpic</samp> without <samp>-mfdpic</samp>.  You should never have to use
it explicitly.
</p>
<span id="index-mlinked_002dfp"></span>
</dd>
<dt><code>-mlinked-fp</code></dt>
<dd>
<p>Follow the EABI requirement of always creating a frame pointer whenever
a stack frame is allocated.  This option is enabled by default and can
be disabled with <samp>-mno-linked-fp</samp>.
</p>
<span id="index-mlong_002dcalls-4"></span>
</dd>
<dt><code>-mlong-calls</code></dt>
<dd>
<p>Use indirect addressing to call functions outside the current
compilation unit.  This allows the functions to be placed anywhere
within the 32-bit address space.
</p>
<span id="index-malign_002dlabels"></span>
</dd>
<dt><code>-malign-labels</code></dt>
<dd>
<p>Try to align labels to an 8-byte boundary by inserting NOPs into the
previous packet.  This option only has an effect when VLIW packing
is enabled.  It doesn&rsquo;t create new packets; it merely adds NOPs to
existing ones.
</p>
<span id="index-mlibrary_002dpic"></span>
</dd>
<dt><code>-mlibrary-pic</code></dt>
<dd>
<p>Generate position-independent EABI code.
</p>
<span id="index-macc_002d4"></span>
</dd>
<dt><code>-macc-4</code></dt>
<dd>
<p>Use only the first four media accumulator registers.
</p>
<span id="index-macc_002d8"></span>
</dd>
<dt><code>-macc-8</code></dt>
<dd>
<p>Use all eight media accumulator registers.
</p>
<span id="index-mpack"></span>
</dd>
<dt><code>-mpack</code></dt>
<dd>
<p>Pack VLIW instructions.
</p>
<span id="index-mno_002dpack"></span>
</dd>
<dt><code>-mno-pack</code></dt>
<dd>
<p>Do not pack VLIW instructions.
</p>
<span id="index-mno_002deflags"></span>
</dd>
<dt><code>-mno-eflags</code></dt>
<dd>
<p>Do not mark ABI switches in e_flags.
</p>
<span id="index-mcond_002dmove"></span>
</dd>
<dt><code>-mcond-move</code></dt>
<dd>
<p>Enable the use of conditional-move instructions (default).
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mno_002dcond_002dmove"></span>
</dd>
<dt><code>-mno-cond-move</code></dt>
<dd>
<p>Disable the use of conditional-move instructions.
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mscc"></span>
</dd>
<dt><code>-mscc</code></dt>
<dd>
<p>Enable the use of conditional set instructions (default).
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mno_002dscc"></span>
</dd>
<dt><code>-mno-scc</code></dt>
<dd>
<p>Disable the use of conditional set instructions.
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mcond_002dexec"></span>
</dd>
<dt><code>-mcond-exec</code></dt>
<dd>
<p>Enable the use of conditional execution (default).
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mno_002dcond_002dexec-1"></span>
</dd>
<dt><code>-mno-cond-exec</code></dt>
<dd>
<p>Disable the use of conditional execution.
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mvliw_002dbranch"></span>
</dd>
<dt><code>-mvliw-branch</code></dt>
<dd>
<p>Run a pass to pack branches into VLIW instructions (default).
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mno_002dvliw_002dbranch"></span>
</dd>
<dt><code>-mno-vliw-branch</code></dt>
<dd>
<p>Do not run a pass to pack branches into VLIW instructions.
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mmulti_002dcond_002dexec"></span>
</dd>
<dt><code>-mmulti-cond-exec</code></dt>
<dd>
<p>Enable optimization of <code>&amp;&amp;</code> and <code>||</code> in conditional execution
(default).
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mno_002dmulti_002dcond_002dexec"></span>
</dd>
<dt><code>-mno-multi-cond-exec</code></dt>
<dd>
<p>Disable optimization of <code>&amp;&amp;</code> and <code>||</code> in conditional execution.
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mnested_002dcond_002dexec"></span>
</dd>
<dt><code>-mnested-cond-exec</code></dt>
<dd>
<p>Enable nested conditional execution optimizations (default).
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-mno_002dnested_002dcond_002dexec"></span>
</dd>
<dt><code>-mno-nested-cond-exec</code></dt>
<dd>
<p>Disable nested conditional execution optimizations.
</p>
<p>This switch is mainly for debugging the compiler and will likely be removed
in a future version.
</p>
<span id="index-moptimize_002dmembar"></span>
</dd>
<dt><code>-moptimize-membar</code></dt>
<dd>
<p>This switch removes redundant <code>membar</code> instructions from the
compiler-generated code.  It is enabled by default.
</p>
<span id="index-mno_002doptimize_002dmembar"></span>
<span id="index-moptimize_002dmembar-1"></span>
</dd>
<dt><code>-mno-optimize-membar</code></dt>
<dd>
<p>This switch disables the automatic removal of redundant <code>membar</code>
instructions from the generated code.
</p>
<span id="index-mtomcat_002dstats"></span>
</dd>
<dt><code>-mtomcat-stats</code></dt>
<dd>
<p>Cause gas to print out tomcat statistics.
</p>
<span id="index-mcpu-6"></span>
</dd>
<dt><code>-mcpu=<var>cpu</var></code></dt>
<dd>
<p>Select the processor type for which to generate code.  Possible values are
&lsquo;<samp>frv</samp>&rsquo;, &lsquo;<samp>fr550</samp>&rsquo;, &lsquo;<samp>tomcat</samp>&rsquo;, &lsquo;<samp>fr500</samp>&rsquo;, &lsquo;<samp>fr450</samp>&rsquo;,
&lsquo;<samp>fr405</samp>&rsquo;, &lsquo;<samp>fr400</samp>&rsquo;, &lsquo;<samp>fr300</samp>&rsquo; and &lsquo;<samp>simple</samp>&rsquo;.
</p>
</dd>
</dl>

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